RF · FMCW radar · antenna design

FMCW radar and antennas, designed from the RF front end up

A radar service that is genuinely rare: the FMCW front end at 5.8 and 24 GHz, the patch antenna arrays on FR-4, and the FPGA signal processing are all designed here — not assembled from an evaluation kit. Range, resolution, and the antenna pattern are engineered to your target. 20+ years.

What this service is

FMCW radar design is the full chain that turns a frequency-swept signal into range and velocity — the RF front end that transmits and receives, the antenna that shapes the beam, and the signal processing that extracts the target. Most of the market either sells an evaluation kit or writes software around someone else's radar chip. Here the radar is engineered end to end, to the frequency plan and form factor the application needs.

That is the difference between a demo on an eval board and a radar that fits your enclosure, hits your range, and meets your cost target. When the antenna, the RF path, and the processing are designed together, the numbers on the datasheet are the numbers you measure.

Who needs it

Product teams needing a radar that fits a specific enclosure, range, and cost — where an off-the-shelf module or eval kit will not do.
Robotics and industrial systems needing presence, range, or velocity sensing that survives fog, dust, and darkness.
Applications needing a custom antenna pattern — beamwidth, gain, or field of view a stock antenna cannot provide.
Teams with a radar concept that works in simulation and needs to become real hardware, measured and validated.
Products needing FPGA-side range-Doppler processing for latency a general-purpose processor cannot hold.

How the work runs

Radar requirements

Range, resolution, field of view, and update rate define the frequency plan (5.8 or 24 GHz), the waveform, and the antenna — before hardware is committed.

Antenna and RF front end

Patch antenna arrays on FR-4 with the RF front end designed for signal integrity: link budget, transmit and receive chains, matching. Calculated first, measured second.

FPGA signal processing

Range-Doppler processing and detection on FPGA (Artix-7) for deterministic, low-latency output the application can rely on.

Integration

The radar tied into the host system — data interface, power, and enclosure — as one coherent unit, not a loose eval board.

Measurement and validation

Range, resolution, and antenna pattern measured on real hardware, so the delivered radar performs to the spec it was designed against.

Why MPV-LAB for this

End to end, in one hand. RF front end, antenna, and FPGA processing designed together — the rare combination that makes a radar fit its application instead of the other way around.
Antennas on FR-4, measured. Patch arrays designed and validated in-house, not accepted from a datasheet.
FPGA where latency matters. Range-Doppler on Artix-7 for deterministic, low-latency detection.
Real boards, real measurements. Radar hardware designed, fabricated, and measured — not an eval-kit demo.
You keep everything. Radar design, antenna files, and FPGA sources are handed over — no lock-in.

Common questions

Do you design the radar or integrate a chip?

Design it — RF front end, antenna, and FPGA processing to your requirements. Where a commercial radar IC is the right building block it is used, but the front end and antenna around it are engineered here, which is what lets the radar meet a form factor and range an eval kit cannot.

What frequencies and ranges do you cover?

FMCW at 5.8 and 24 GHz, with range and resolution set by the waveform and antenna. The frequency plan follows your range, field of view, and regulatory constraints, decided with a link budget first.

Can you design a custom antenna pattern?

Yes. Patch antenna arrays on FR-4 are designed to the beamwidth, gain, and field of view the application needs, then measured on real hardware rather than assumed from a reference design.

Do you handle the signal processing too?

Yes. Range-Doppler processing, detection (CFAR), and where relevant micro-Doppler classification run on FPGA for deterministic, low-latency output — delivered as part of the radar, not left to the customer.

Who owns the design?

You do, once the milestone is paid. Radar design, antenna files, and FPGA sources are handed over in full — any other engineer can continue from there.